Hardware side-channel attacks occur when a victim program’s hardware resource usage is influenced by a secret, and an attacker observes this resource usage (e.g., via its effect on execution time) to infer the secret’s value. Hardware side-channel attacks were once thought to threaten only secret-processing code and to be mitigated by constant-time programming, which avoids passing secrets as inputs to certain unsafe instructions that leak their operands via hardware side channels. However, Spectre attacks reveal that transient execution of instructions along mispredicted code paths can leak victim secrets, even if they are never leaked or even accessed architecturally. These attacks bypass gold standard software-level security policies (e.g., constant-time programming and sandboxing), establishing hardware side-channel attacks as a threat to all programs that hold secrets in architectural state.

Hardware side-channel defenses in general, and Spectre defenses in particular, require cooperation between hardware and software. Our research studies what this cooperation should look like and how to design and verify the implementations of new hardware-software contracts that enable it. This talk will introduce three such contracts. First, I will present the ASP contract, which empowers programs at compile-time to restrict their runtime control-/data-flow, enabling Serberus—a hardware-enabled software defense against Spectre for current-generation hardware. Next, I will present the ProtISA contract, which empowers programs at compile-time to specify what architectural registers and memory bytes may hold secrets at each program point, enabling Protean—a software-enabled hardware defense against Spectre for next-generation hardware. Finally, I will present leakage functions, a set of which form a contract that characterizes how a microarchitecture’s hardware side-channels create observably-distinct executions for instructions as a function of unsafe instructions’ operands, enabling future probabilistic software-level and fine-grained hardware-level defenses against side-channel attacks.