POPL 2026
Sun 11 - Sat 17 January 2026 Rennes, France
Sun 11 Jan 2026 16:54 - 17:12 at Salle 19 - Hardware Security Chair(s): Jérémy Thibault

The security of computer systems eventually relies on the security of the underlying hardware and on the security mechanisms that it offers. We extend a simple RISC-V processor written in the Kôika Hardware Description Language (HDL) with security mechanisms, and prove that these mechanisms are correct.

We do so by compiling Kôika circuits into a representation well-suited for automated theorem provers. We strive to make our proofs modular, i.e., function by function or rule by rule.

Sun 11 Jan

Displayed time zone: Brussels, Copenhagen, Madrid, Paris change

16:00 - 17:30
Hardware SecurityPriSC at Salle 19
Chair(s): Jérémy Thibault EPFL
16:00
18m
Talk
FSLH: Flexible Mechanized Speculative Load Hardening
PriSC
Jonathan Baumann Max Planck Institute for Security and Privacy (MPI-SP), Roberto Blanco Max Planck Institute for Security and Privacy (MPI-SP), Léon Ducruet Aarhus University, Sebastian Harwig MPI-SP and Ruhr University Bochum, Cătălin Hriţcu MPI-SP
File Attached
16:18
18m
Talk
Towards Robust Secure Compilation in Presence of Speculative Execution
PriSC
Léopold Clément Télécom Paris, Ulrich Kühne Télécom Paris, Florian Brandner Télécom Paris, Renaud Pacalet Télécom Paris
16:36
18m
Talk
Compiling countermeasures against fault attacks with “Tracing LLVM”
PriSC
Sébastien Michelland Inria Rennes, Christophe Deleuze Université Grenoble-Alpes - Grenoble INP - LCIS, Laure Gonnord Université Grenoble-Alpes - Grenoble INP - LCIS
File Attached
16:54
18m
Talk
Modular and automatic formal verification of a RISC-V processor with security mechanisms
PriSC
Pierre Wilke CentraleSupélec, Cyprien Jules CentraleSupélec, Inria, CNRS, Univ. Rennes, Guillaume Hiet CentraleSupélec, Inria, CNRS, Univ. Rennes
17:12
18m
Talk
Fun with flags: How Compilers Break and Fix Constant-Time Code
PriSC
Antoine Geimer Univ. Lille, CNRS, Inria, Clémentine Maurice Univ. Lille, Inria, CNRS