POPL 2026
Sun 11 - Sat 17 January 2026 Rennes, France
Sun 11 Jan 2026 17:12 - 17:30 at Salle 19 - Hardware Security Chair(s): Jérémy Thibault

Developers rely on constant-time programming to prevent timing side-channel attacks. But these efforts can be undone by compilers, whose optimizations may silently reintroduce leaks. While recent works have measured the extent of such leakage, they leave developers without actionable insights: which optimization passes are responsible, and how to disable them without modifying the compiler remains unclear.

In this paper, we conduct a qualitative analysis of how compiler optimizations break constant-time code. We construct a dataset of compiler-introduced constant-time violations and analyze the internals of two widely used compilers, GCC and LLVM, to identify the specific optimization passes responsible.
Our key insight is that a small set of passes are at the root of most leaks. To the best of our knowledge, we are also the first to characterize how the interactions between these passes contribute to leakage. Based on this analysis, we propose an original and practical mitigation that requires no source code modification or custom compiler: disabling selected optimization passes via compiler flags. We show that this approach significantly reduces leakage with minimal performance overhead, offering an immediately deployable defense for developers.

Sun 11 Jan

Displayed time zone: Brussels, Copenhagen, Madrid, Paris change

16:00 - 17:30
Hardware SecurityPriSC at Salle 19
Chair(s): Jérémy Thibault EPFL
16:00
18m
Talk
FSLH: Flexible Mechanized Speculative Load Hardening
PriSC
Jonathan Baumann Max Planck Institute for Security and Privacy (MPI-SP), Roberto Blanco Max Planck Institute for Security and Privacy (MPI-SP), Léon Ducruet Aarhus University, Sebastian Harwig MPI-SP and Ruhr University Bochum, Cătălin Hriţcu MPI-SP
File Attached
16:18
18m
Talk
Towards Robust Secure Compilation in Presence of Speculative Execution
PriSC
Léopold Clément Télécom Paris, Ulrich Kühne Télécom Paris, Florian Brandner Télécom Paris, Renaud Pacalet Télécom Paris
16:36
18m
Talk
Compiling countermeasures against fault attacks with “Tracing LLVM”
PriSC
Sébastien Michelland Inria Rennes, Christophe Deleuze Université Grenoble-Alpes - Grenoble INP - LCIS, Laure Gonnord Université Grenoble-Alpes - Grenoble INP - LCIS
File Attached
16:54
18m
Talk
Modular and automatic formal verification of a RISC-V processor with security mechanisms
PriSC
Pierre Wilke CentraleSupélec, Cyprien Jules CentraleSupélec, Inria, CNRS, Univ. Rennes, Guillaume Hiet CentraleSupélec, Inria, CNRS, Univ. Rennes
17:12
18m
Talk
Fun with flags: How Compilers Break and Fix Constant-Time Code
PriSC
Antoine Geimer Univ. Lille, CNRS, Inria, Clémentine Maurice Univ. Lille, Inria, CNRS